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ICS307-01/02
SERIALLY PROGRAMMABLE CLOCK SOURCE
Description
The ICS307-01 and ICS307-02 are versatile serially programmable clock sources which take up very little board space. They can generate any frequency from 6 to 200 MHz and have a second configurable output. The outputs can be reprogrammed on the fly and will lock to a new frequency in 10 ms or less. Smooth transitions (in which the clock duty cycle remains near 50%) are guaranteed if the output divider is not changed. The devices includes a PDTS pin which tri-states the output clocks and powers down the entire chip. The ICS307-02 features a default clock output at start-up and is recommended for all new designs. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed. For applications which require defined input to output skew, use the ICS527-01.
Features
* Packaged in 16-pin (150 mil wide) SOIC * ICS307M-02 and -02I available in Pb (lead) free
package
* Highly accurate frequency generation * Serially programmable: user determines the output
frequency via a 3 wire interface
* * * * * * * *
Eliminates need for custom quartz Input crystal frequency of 5 - 27 MHz Output clock frequencies up to 200 MHz Power down tri-state mode Very low jitter Operating voltage of 3.3 V or 5 V 25 mA drive capability at TTL levels Industrial temperature version available
Block Diagram
VDD TTL SCLK DATA STROBE X1/ICLK Crystal or clock input Crystal Oscillator X2 Shift Register 9 2 3 2 7 R6:R7 Reference Divider V8:V0 C1:C0 S2:S0 F1:F0 VCO Divider CLK1 Phase Comparator, Charge Pump, and Loop Filter VCO Output Divider Function Select 3 S2:S0 GND 3 F1:F0 PDTS CLK2
Optional crystal capacitors
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Pin Assignment
X1/ICLK NC VDD NC GND CLK2 NC SCLK 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 X2 NC NC PDTS DATA CLK1 NC STRO BE
16 pin (150 m il) SO IC
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name X1/ICLK NC VDD NC GND CLK2 NC SCLK STROBE NC CLK1 DATA PDTS NC NC X2 Pin Type XI Power Power Output Input Input Output Input Input XO Pin Description Crystal connection (REF frequency). Connect to a parallel resonant crystal or an input clock. No connect. Do not connect anything to this pin. Connect to 3.3 V or 5 V. No connect. Do not connect anything to this pin. Connect to ground. Output clock 2, determined by F0 - F1. Can be reference, REF/2, CLK1/2 , or off. No connect. Do not connect anything to this pin. Serial clock. See timing diagram. Strobe to load data. See timing diagram. No connect. Do not connect anything to this pin. Output clock 1, determined by R0 - R6, V0 - V8, S0 - S2, and input frequency. Data input. Serial input for three words which set the output clock(s). Powers down entire chip, tri states CLK1 and CLK2 outputs when low. Internal pull-up. No connect. Do not connect anything to this pin. No connect. Do not connect anything to this pin. Input crystal connection. Connect to a crystal or leave unconnected for clock input.
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Determining the Output Frequency
On power-up, the ICS307-01 on-chip registers can have random values so almost any frequency may be output from the part. CLK1 will always have some clock signal present, but CLK2 could possibly be OFF (low). The ICS307-02 on-chip registers are initially configured to provide a x1 output clock on both the CLK1 and CLK2 outputs. The output frequency will be the same as the input clock or crystal. This is useful if the ICS307 will provide the initial system clock at power-up. Since this feature is an advantage in most systems, the ICS307-02 is recommended for new designs. With programming, the user has full control in changing the desired output frequency to any value over the range shown in Table 1 on page 4. The output of the ICS307 can be determined by the following equation:
VDW + 8 CLK1Frequency = InputFrequency 2 -----------------------------------------( RDW + 2 ) OD
To determine the best combination of VCO, reference, and output dividers, see the online calculator at http://www.icst.com/products/ics307inputForm.html or contact ICS by sending an e-mail to ics-mk@icst.com with the desired input crystal or clock and the desired output frequency.
Where: VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 are not permitted) Reference Divider Word (RDW) = 1 to 127 (0 is not permitted) Output Divider = values on page 4 The following operating ranges should be observed. For the commercial temperature range:
VDW + 8 55MHz < InputFrequency 2 ------------------------ < 400MHz RDW + 2 InputFrequency 200kHz < --------------------------------------------RDW + 2
And for the industrial temperature range:
VDW + 8 60MHz < InputFrequency 2 ------------------------ < 360MHz RDW + 2 Input Frequency 200kHz < -----------------------------------------RDW + 2
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Setting the Device Characteristics
The tables below show the settings which can be configured, as well as the VCO and Reference dividers. Table 1. Output Divide and Maximum Output Frequency
S2 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 CLK1 Output Divide 10 2 8 4 5 7 3 6 Max. Frequency 5 V or 3.3 V (MHz) 40 200 50 100 80 55 135 67 Max. Frequency Industrial Temp. Version 36 180 45 90 72 50 120 60
Table 2. CLK2 Output
F1 0 0 1 1 F0 0 1 0 1 CLK2 REF FREF/2 OFF (Low) FCLK1/2
Table 3. Output Duty Cycle Configuration
TTL 0 1 Duty Cycle Measured At 1.4 V VDD/2 Recommended VDD 5V 3.3 V
Note: The TTL bit optimizes the duty cycle at different VDD. When VDD is 5 V, set to 0 for a near-50% duty cycle with TTL levels. When VDD is 3.3 V, set this bit to 1 so the 50% duty cycle is achieved at VDD/2. Table 4. Crystal Load Capacitance
C1 0 0 1 1 C0 0 1 0 1 VDD = 5V 22.3 - 0.083 f 23.1 - 0.093 f 23.7 - 0.106 f 24.4 - 0.120 f VDD = 3.3V 22.1 - 0.094 f 22.9 - 0.108 f 23.5 - 0.120 f 24.2 - 0.135 f
Note: f is the crystal frequency in MHz between 10 and 27 MHz. Effective load capacitance will be higher for crystal frequencies lower than 10 MHz. If a clock input is used, set C1 = 0 and C0 = 0.
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Bypass Mode
If R6:0 is programmed to 0000000, the PLL is powered down and bypassed; the reference frequency will come from both CLK1 and CLK2. It is possible to generate glitches going into and out of this mode.
Configuring the ICS307
The ICS307 can be programmed to set the output functions and frequencies. The three data bytes are written in DATA pin in this order:
C1
MSB
C0
TTL
F1
F0
S2
S1
S0
LSB
V8
MSB
V7
V6
V5
V4
V3
V2
V1
LSB
V0
MSB
R6
R5
R4
R3
R2
R1
R0
LSB
C1 is loaded into the port first and R0 last. R6:R0 Reference Divder Word (RDW) V8:V0 VCO Divider Word (VDW) S2:S0 Output Divider Select (OD) F1:F0 Function of CLK2 Output TTL Duty Cycle Settings C1:C0 Internal Load Capacitance for Crystal
The ICS307 can be reprogrammed at any time during operation. If R6:0, V8:0, TTL, or C1:0 are changed, the frequency will transition smoothly to the new value over about 1 ms, without glitches or short cycles. If S2:0 is changed, it is possible to generate glitches on CLK1 and also on CLK2 for F1:0 = 1 1. Changing F1:0 will generate glitches on CLK2.
Power up default values for ICS307-02
0 0 1 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0
The input frequency will come from both outputs. A warning about using the default configuration with input frequencies lower than 13.75 MHz The VCO will run only as low as its minimum frequency, which is guaranteed to be no more than 55 MHz. So, in the powerup default condition, the PLL is guaranteed to lock to the input frequency down to 55/4 = 13.75 MHz. However, the part will typically run much slower. The typical minimum VCO frequency is about 30 - 40 MHz, depending on voltage, temperature, and lot variation; so in the powerup default setting, the CLK2 output will be a minimum of 7.5 - 10 MHz even if the input frequency is lower than that. The output is not locked to the reference input and so the frequency is not very stable and the phase noise is higher. In this condition, the CLK2 output will accurately provide the reference frequency down to 0 Hz because this signal path bypasses the PLL.
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Programming Example
To generate 66.66 MHz from a 14.31818 MHz input, the RDW should be 59, the VDW should be 276, and the Output Divide is 2. Selecting the minimum internal load capacitance, CMOS duty cycle, and CLK2 to be OFF means that the following three bytes are sent to the ICS307:
00110001 Byte 1 10001010 Byte 2 00111011 Byte 3
As show in Figure 2, after these 24 bits are clocked into the ICS307, taking STROBE high will send this data to the internal latch and the CLK output will lock within 10 ms. Note: If STROBE is in the high state and SCLK is pulsed, DATA is clocked directly to the internal latch and the output conditions will change accordingly. Although this will not damage the ICS307, it is recommended that STROBE be kept low while DATA is being clocked into the ICS307 in order to avoid unintended changes on the output clocks.
AC Parameters for Writing to the ICS307
Parameter tSETUP tHOLD tW tS Condition Setup time Hold time after SCLK Data wait time Strobe pulse width SCLK Frequency
DATA tsetup C1 C0 TTL thold F1 R1 R0
Min. 10 10 10 40
Max.
Units ns ns ns ns
50
MHz
SCLK tw STROBE ts
Figure 2. Timing Diagram for Programming the ICS307
External Components/Crystal Selection
The ICS307 requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS307 to minimize lead inductance. A 33 terminating resistor can be used in series with CLK1 and CLK2 outputs. A parallel resonant, fundamental mode crystal with a load (correlation) capacitance of C should be used, where C is the value calculated from Table 4. For crystals with a specified load capacitance greater than C, additional crystal capacitors may be connected from each of the pins X1 and X2 to ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL-C)*2, where CL is the crystal load capacitance in pF and C is the capacitance value from Table 4. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either pin).
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Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS307-01/02. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Ambient Operating Temperature, Industrial Storage Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70C -40 to +85C -65 to +150C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
0 +3.0
Typ.
Max.
+70 +5.5
Units
C V
DC Electrical Characteristics
VDD=3.3 V 5% , Ambient temperature 0 to +70C, unless stated otherwise
Parameter
Operating Voltage Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage
Symbol
VDD VIH VIL VIH VIL
Conditions
X1/ICLK only X1/ICLK only PDTS on ICS307-01 All other inputs, ICS307-01/02
Min.
3.0
Typ.
Max.
5.5
Units
V V V V V V V
(VDD/2)+1 VDD/2 VDD/2 (VDD/2)-1 2 0.4 0.8 2.4 0.4 VDD-0.4 26 13
Output High Voltage Output Low Voltage Output High Voltage, CMOS level Operating Supply Current
VOH VOL VOH IDD
IOH = -25 mA IOL = 25 mA IOH = -4 mA 20 MHz crystal No load, 100 MHz out 100 MHz out, 3.3 V
V V mA mA
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Parameter
Short Circuit Current Input Capacitance On-Chip Pull-up Resistor
Symbol
CIN RPU
Conditions
CLK outputs Pin 13
Min.
Typ.
70 4 270
Max.
Units
mA pF k
AC Electrical Characteristics
VDD = 3.3 V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise
Parameter
Input Frequency
Symbol
FIN
Conditions
Fundamental crystal Clock
Min.
5 2 6 6
Typ.
Max.
27 50 200 180
Units
MHz MHz MHz MHz ns ns
Output Frequency (see Table 1) I-temp version Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Power-up Time One Sigma Clock Period Jitter Maximum Absolute Jitter Note 1: Measured with 15 pF load. tja
Deviation from mean
tOR tOF
0.8 to 2.0 V, Note 1 2.0 to 8.0 V, Note 1 even output divides
odd output divides STROBE goes high until CLK out
1 1 45 40 3 50 120 49-51 55 60 10
% % ms ps ps
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
120 115 105 58
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
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Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
16
Millimeters Symbol Min Max
Inches Min Max
E INDEX AREA
H
12 D
A A1 B C D E e H h L
h x 45
1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8
.0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8
A A1
C
-Ce
B SEATING PLANE L
.10 (.004)
C
Ordering Information
Part / Order Number ICS307M-01 ICS307M-01T ICS307M-01I ICS307M-01IT ICS307M-02 ICS307M-02T ICS307M-02LF ICS307M-02LFT ICS307M-02I ICS307M-02IT ICS307M-02ILF ICS307M-02ILFT Marking ICS307M-01 ICS307M-01 ICS307M-01I ICS307M-01I ICS307M-02 ICS307M-02 ICS307M-02LF ICS307M-02LF ICS307M-02I ICS307M-02I ICS307M02ILF ICS307M02ILF Shipping packaging Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Package 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC Temperature 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
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